Sunday, August 11, 2013

Polysix - Exploring the MG Delay Circuit

As discussed in my previous post, the "MG Delay" on my Korg Polysix seems to have a problem.  On my Polysix, there is always a delay between pressing a note and getting the MG effect, even with the MG Delay at zero.  I still don't know whether all Polysix's do this, or just mine.  Either way, I'd like to fix it. In this post, I dive in to try to see why my Polysix does this.  My goal is to find spots where I could modify the circuit to make it perform the way that I want.

First, let's look at the part of the schematic that controls the modulation generator (MG).  It's on KLM-367 and I've excerpted the relevant bits in the figure above.  I've highlighted four sections of the circuit: (1) DAC Sample-and-Hold, (2) "MG Delay" Comparator,  (3) "MG Amount" VCA, and (4) the MG Oscillator.  Let's work backwards from the end to see where the MG behavior deviates from what I'd expect.

View the Overall MG Output:  I start by looking at the overall output of this collection of circuits.  The overall output is on the bottom right at point "J".  This point yields the oscillating MG signal itself, including any modulation of the MG signal due to pressing a key on the keyboard.  You can easily access this point in the Polysix by clipping an oscilloscope probe to TP5, which stands proudly on the left side of KLM-367.

Clipping into TP5 to see the MG Signal
I then used the Polysix's knobs to configure the MG with frequency turned really high, with the delay set to zero, and with the level set to maximum.  I set the MG slider switch set to send the MG to the VCA.  When you set the MG in this way, and if you look at the signal at TP5, you usually see an oscillating triangle wave.  This is normal MG signal.  On my synth, when you press a key on the keyboard, you see the that the MG signal becomes suppressed for about 100 ms.  While this is exactly the effect expected when employing the "MG Delay", I think that it is wrong that it occurs even when my MG Delay set to zero.  In my opinion, when set to zero, there should be no gap at all.  So, while I'm not pleased that we are seeing a gap, I am pleased that I have confirmed that it is occurring at TP5 -- it means that I can continue to chase it back through the circuit.

Signal measured at TP5, Where a gap in the MG signal is seen even with MG Delay set at zero.
"MG Amount" VCA:  Looking at the MG signal shown above, we see that the amplitude of the MG signal is being reduced (attenuated) due to the keypress.  If we look at the circuit schematic, we see that the last block of circuitry prior to point J is a voltage-controlled amplifier (VCA) based around IC21, which is a classic LM13600 trans-conductance amplifier.  I've highlighted this part of the circuit in yellow.  We see that the VCA is being given the basic oscillating MG signal from the circuitry in blue.  Controlling the gain of the VCA is a combination of two signals: (1) the "MG Amount" voltage output by the DAC sample-and-hold and (2) the "MG Delay" Comparator voltage output from IC14.  Since its the influence of the "MG Delay" that I'm trying to explore, let's look at the "MG Delay" comparator (IC 14) in more detail.

"MG Delay" Comparator:  IC14 is an operational-amplifier that appears to be configured as a comparator.  Its output will be high if the voltage at pin 3 is greater than at pin 2.  Its voltage will be low if the voltage at pin 3 drops below pin 2.  If we consider the "output" to be the voltage at R79, the diode (D12) and the cap (C34) will slow the transition from low-to-high, but the overall idea of the comparator is the same.  Let's probe it to see...

Measuring Pin 3 on IC 14 using the red clip on R86.  At the bottom, probing R79 directly.
The figure below shows the signals around IC14 to see what happens when I press a key on the keyboard.  Again, this figure is with the "MG Delay" set to zero.

As you can see, the voltage at pin 3 drops from high to low when there is a keypress.  If I were to zoom out, you would see that the voltage at pin 3 slowly recovers back to its high state over a couple of seconds as C33 is charged up from +15V via R86.  Because of the slow recovery at Pin 3, the voltage at Pin 3 is, in effect, a measure of time since the last new keypress.  Looking at the yellow trace in the picture above, we see that the output of the comparator (as measured at R79) is normally high and then drops as soon as the key is pressed.  In this case, the output then smoothly recovers back to its high value after a short passage of time.  Because the voltage at R79 controls the gain of the "MG Amount" VCA, this drop at R79 is causing the suppression of the MG signal that we saw earlier.  With the "MG Delay" set to zero, I would not expect to see any suppression of the MG signal, which means that I would not expect to see the voltage at R79 drop.  But we do see it drop.  Why is it dropping?

Comparing Pin 2 to Pin 3:  The voltage of R79 is driven by the output of IC14.  The output of IC14 is driven by a comparison of the voltage at Pin 3 to Pin 2.  Let's probe these these two signals.  

Measuring Around IC14.  Pin 3 is via the red clip at R86.  Pin 2 is probed directly.
In the o-scope picture below, note that I've zoomed out the time axis relative to the previous o-scope picture.  As you can see, the red line is the voltage at pin 3, which shows the quick drop from high-to-low as the key is pressed and it shows the slow recovery in voltage as C33 is charged back up.  The yellow trace shows the voltage at Pin 2, which is the voltage produced by the DAC sample-and-hold to represent the "MG Delay" setting.  For clarity, I've turned the "MG Delay" knob up to a value of "2", which raises the voltage at Pin 2.

You can see how the voltage at Pin 3 is normally higher than the voltage at Pin 2.  You can see that, when the key is pressed, the voltage at Pin 3 drops below the voltage at Pin 2 for a brief period.  That drop of Pin 3 below Pin 2 is what causes the output of IC14 to drop, which is what causes the voltage at R79 to drop, which is what causes the gain of IC21 to drop, which is what causes the MG signal to be suppressed.  It's like dominoes falling in a line.  Great!  This behavior makes total sense when the "MG Delay" is set to "2".   But I'm seeing MG suppression even with "MG Delay" set to zero.  Let's look to see what happens when we drop the "MG Delay" back to zero...

So, as expected, the voltage at Pin 2 is lower because I turned the "MG Delay" knob from "2" down to "0".  In this view, it is unclear whether Pin 3 drops below Pin 2.  Let's zoom in...

Pin 3 Drops Below Pin 2:  Now we can see that, even with "MG Delay" set to zero, the voltage at Pin 3 does indeed drop below the voltage at Pin 2.  It is brief (~5ms), but it happens.  This would cause the output of IC14 (ie, Pin 1) to pulse low for a similar time period.  But our MG is suppressed for 100ms, not 5ms.  Well, the diode D12 allows even that short downward pulse at Pin 1 to discharge the cap C34.  The diode then prevents IC14 from charging C34 back up.  Instead, current must leak through both R78 and R79 to charge C34.  This takes time.  As a result, even a short 5ms pulse from IC14 causes the voltage at R79 to drop quickly but to stay low for a while as it is slowly charged.  Since R79 controls the gain of IC21, even this slight difference between Pin 3 and Pin 2 results in a noticeably long (100 ms) suppression of the MG signal.

What to do about it?  If the picture above were seen for an "MG Delay" setting other than zero, everything would be fine.  The problem is that, for an "MG Delay" of zero, the voltage at Pin 2 should be low enough that it is always below Pin 3.  If that were the case, the output of IC14 would always stay high, which means that the MG signal would never be suppressed.  This is not the case in my Polysix.  It appears that my "MG Delay" CV does not go low enough.  Unfortunately, even after readjusting my DAC (using the brief instructions in the Polysix Service Manual), the "MG Delay" voltage is still a bit too high and my MG still gets briefly suppressed with each new keypress.  My alternative, therefore, is to adjust the behavior of the voltage at Pin 3.  If the voltage at Pin 3 did not drop quite as low, it would stay above the voltage at Pin 2, thereby avoiding the suppression of the MG signal.  The voltage at Pin 3 could be adjusted in a number of ways.  I'll look at these possible modifications in my next post.

Update: I've modified the circuit so that MG Delay of zero works as desired.

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