Find the MG Delay Circuit: A schematic of the relevant part of the Polysix circuitry is shown below. The MG Delay functionality is effected by IC14, which compares the MG Delay CV produced by the DAC sample-and-hold (arriving at Pin 2 of IC14) to a voltage signal that pulses which each new keypress (arriving at Pin 3 of IC 14). Whenever Pin 3 goes lower than Pin 2, the MG is suppressed. I'd like modify the circuit so that, when the MG Delay is set to zero, the voltage at Pin 3 does not drop below whatever voltage is being delivered by the DAC to Pin 2.
Swap R98 to Control the Voltage Drop at Pin 3: The voltage at Pin 3 drops with each new keypress because a keypress causes Q5 to conduct, which allows the charge stored in C33 to drain out via R98. Because Q5 only conducts for a short amount of time, we can limit how low C33 gets by constricting the flow of charge out of C33. The easiest way to do that is to simply swap R98 from its default 4.7K value to a higher value. At first, I tried 20K, but decided that 10K was better.
|New R98. I first tried 20K. I settled on 10K.|
Viewing the Impact of R98: To visually confirming that I correctly affected the voltage at Pin 3, I used my oscilloscope to view the voltage at Pin 3 (as altered by my modification of R98) and the voltage at Pin 2 (the MG Delay CV). As shown in the picture below, changing R98 now keeps the voltage at Pin 3 from dropping below the MG Delay CV that is being applied to Pin 2. As a result, the output of IC14 now stays high, which means that the MG signal is not suppressed by the start of the note. Success!
So, with this modification, I have achieved my goal of making the MG Delay work as I want. When turned to zero, the MG Delay is defeated. When turned slightly above zero, the MG Delay works as before. I'm pleased.